* Hiroshige's Goto Weekly overseas news *  
As for next term CPU core " K9 " of AMD in 2005 appearance or  
 
 
 
 
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- Overlapping, it develops the plural CPU cores the AMD  
 
 
Presumption development cycle of AMD CPU  
* As for PDF edition this way  
The AMD has needed the next CPU core by around 2005. The next generation OS, to seek new CPU core architecture, because new memory technology raises the necessity of new interface technology. In addition, counting from CPU development cycle of the AMD, 2005 - in around 6 it becomes the calculation where the following CPU appears. The Athlon 64 (K8 system) by the fact that it is late, the interval of the next CPU core is supposed it became narrow. In other words, it follows to the K8, it is thought " the K9 " core is visible, while being close.  
 
Of usually, 4 - 5 years it is required for the design high end CPU for the PC. But, Intel and both AMD have the group of CPU development teams inside the company, have shortened development cycle to half by the fact that development period is overlapped.  
 
For example, the Dirk Meyer of the AMD (the darkness * mayor) upper-class vice president (the Senior Vice President, the Computation Products Group), June of 2002 group interview (Tokyo) with " speaking generally, it throws measure CPU $dm 2 years. That, inside and the rival as for this being the same, this trend probably will continue ".  
 
Originally the AMD had the x86 CPU development team of the respective company, but it purchased the CPU development company NexGen in '96 year, improving the core which the NexGen developed, it leaped by the fact that release it does as " a K6 ". Furthermore, development power was strengthened by the fact that the many architects and the engineer are received from the Alpha processor development team of the old DEC.  
 
The Dirk Meyer person who takes charge of the K7 the architect of original Alpha 21064/21264, the Fred Weber which takes charge of the K8 (the フレッド * ウェバー the vice president (the Vice President, the Computation Producuts Group) was the architect of the original NexGen. As for the principal architect because that way it has remained in the AMD, presently the AMD in the group of development teams, is seen as the thing which overlapping, develops the plural CPUS.  
 
The result of overlap development, the AMD reached the point where from 2 the new CPU can be thrown $dm 3 years. It announced the K6 in '97 year April, the succeeding Athlon (the K7) announcement, at that time 2 years and 1 quarter just a little only was left to '99 year August. As the Meyer person points out, being approximately 2 year cycle it had come.  
 
And, as for the following K8 when it is the schedule which appears during 2001 years, around '98 year was reported. It was said that at that time, the Jim Keller person of the old DEC (quitting work) you take charge of the K8 after the quitting work of the Atiq Raza person, already have begun development. Somehow, first the K7 -> it was the intention also the K8 throwing in 2 year several months it seems.  
 
 
 
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- In regard to calculation becomes appearance during 2005 years the K9 of the AMD which  
 
But, as everyone has known, throwing time of the K8 it came off. During 2001 years it let escape also during 2002 years of throwing target which is published to the spring of 2002 as anyhow. And, the this spring when it is secure expectation, as for announcing just the Opteron for the server & the work station. Athlon 64 for the desktop slipped to September. In other words, if the K7 -> the Opteron if 3 year half, the K7 -> Athlon 64 it means that as many as 4 years are required.  
 
Though, this, is the problem which it occurs because it tries the AMD excessively many elements (CPU architecture, process technology, the platform) will change at one time. This time, it is said you took time with SOI process of new introduction. As for the notion that where, the K7 -> also the K8 as for cycle in regard to original plan, the AMD fall of 2002 had designated shipment as the target, is thought perhaps they were approximately 3 years. In other words, it can presume the CPU cycle of the AMD, they are 2 year half - 3 years, as still.  
 
So, the following K9 how being? You will try presuming from former cycle. When we assume, the K6 -> the K7 approximately 2 year half, the K7 -> the K8 in regard to plan was 3 years, as for the K9 it is found that it has approached rather. When it calculates from 2002 fall of original schedule of the K8, if the 2 years half later if spring of 2005, 3 years later, it means the fall of 2005. In other words, also the late during 2005 years becomes the calculation where the K9 appears.  
 
In this case, Athlon between of 64 and the K9 is only 2 years, but because as for this Athlon 64 was late. Perhaps schedule of the K9 which does the design in another team probably will not that much receive the influence of this lag. In addition, because you have already done, the critical part such as HyperTransport and AMD 64 architecture and introduction of SOI process with the Athlon 64/Opteron, development burden of the K9 relatively becomes light.  
 
In this way, when you watch, it is found that the possibility from schedule the K9 of the すると and the AMD appearing in approximately 2005 years is very high.  
 
The AMD usually, from half year of product release schedule 3 about quarter releases the sample tip/chip before, announces architecture to before that several months, furthermore announces the road map before the that 1 year above. When we assume, the pattern is succeeded, architecture is announced to fall of 2004, while being close relatively, it is presumed also the road map is announced.  
 
 
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- Does not change even with the K9 the 64bit approach which  
 
So, the AMD taking what kind of architecture in the K9?  
 
First as for being clear, as for approach to the 64bit it is to continue the K8. With the K8, the architecture which can be able to send in both of the existing x86 cord/code and the AMD 64 cord/code high speed is taken. As for Dirk Meyer upper-class vice president of the AMD, in November last year event " Forum64 " ", the K10, 11 and 12, it is possible even with the K9 to be able to send the both of the 32bit and the 64bit in the same way, " you declared. Though, in case of the AMD 64 architecture which expands the x86 naturally to the 64bit, it is easy to maintain the both efficiency of the x86 and AMD 64.  
 
Those where one more almost it is clear the AMD are in the future to continue to integrate memory interface to the CPU. This architecture lowered the レイテンシ of memory access, brought big efficiency improvement to the K8. In addition, multiple processor constitution it is been useful to also making easier than Intel architecture. Although there are several difficulties in integration of DRAM interface, this architecture is thrown away with cannot think the AMD simply.  
 
Then, the possibility also the HyperTransport continuing is high. In the first place, we declare the AMD from beginning, the HyperTransport is designated as interface between the long-term tip/chip, you said also future continues the interchangeability. At least, the K9 generation probably uses the HyperTransport.  
 
 
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- As for largest point of K9 NGSCB correspondence?  
 
So with the K9 something changing?  
 
There is a clear thing even here. That is loading the security function. As for the AMD, in the CPU of 2005 years this function is required securely. As for that, the next generation OS " Longhorn which the Microsoft throws to 2005 (long horn)", but " the Next-Generation Secure Computing Base (the NGSCB)", it mounts.  
 
The NGSCB, code name " Palladium (the パレイディアム" with with the technology which was called, adds hardware based security performance to the PC, the Microsoft supplies the OS layer which can utilize that. Because of that with the NGSCB, security function is required to also each hardware of the PC.  
 
Considerable modification joins to the CPU even among them. Because introduction of secure program execution mode and secure memory access function becomes necessary. In other words, only the program which it runs with completely new operational mode and that mode the memory space which cannot be accessed is provided with paging. Mounting such function probably will not go to simplicity.  
 
The AMD already in 2002, has made that it is the direction which mounts security function clear. For example, November of 2002 with post keynote Q of the COMDEX & A session " before approximately 6 months, as for us it announced that the fact that more secure PC is made is supported. Because of the object, it has been about to change our tip/chip architecture " it had explained the AMD.  
 
Above the Microsoft has designated 2005 years as the target, it is the expectation where also the AMD has designed the CPU of NGSCB correspondence with the same schedule. When with it becomes, that is the K9. Also the Intel of the rival, the following " the Prescott (the press cot)" the empty, corresponds to the NGSCB " the LaGrande (the ラグランド" mounts function, (enabling is not done). First purpose of the K9 (difference does performance rise) it probably is to correspond to the NGSCB.  
 
Is, but in the K9 generation, even in addition big expansion is expected. That is the around the interface.  
 
< May 8th > < Goto > With the WincHec becomes clear the next generation secure PC conception of the Microsoft which  
Http: //pc.watch.impress.co.jp/docs/2003/0508/kaigai01.htm  
 
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(September 12th of 2003)  
 
[ Hiroshige Reported by Goto (Hiroshige Goto) ]  
 
 
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